[System09] 6809 system busses in an FPGA

Sun Mar 8 16:40:33 UTC 2009

Hi John,

Thanks for the email – all points noted.

Just spent half an hour working what buttons to press on ISE for a simple
sim (grabbed some source of the net) and yes I can see how simulation will
make it possible to get a SOC going.

I think I’ve got a few days on playing with the simulator to work out why my
revised system has stopped running code.

Your s/w debug hardware sounds very useful.  One can use a SWI that the
debugger puts in RAM for you but that can’t be use to trap writes and reads
to variables (from anywhere) where as a h/w breakpoint can.

At work our home grown processor has a break on PC address mechanism and
also a data breakpoint register which can be set of R, W or R/W at a given
data address.  Since it’s a Harvard architecture that’s one BP for each
space.

More soon I hope.

Thanks again.

73,

… Andrew

   _____  

From: John Kent [mailto:jekent at optushome.com.au] 
Sent: 08 March 2009 10:54
To: FPGA 6809
Subject: Re: [System09] 6809 system busses in an FPGA

Hi Andrew

Andrew Burge wrote: 

Yes, that makes sense.  I might look at John's system some more and also
some of the other System On Chip projects on opercores for other "this is
how it's done" tips.

I have not taken a close look at other SOC interconnect systems on open
cores, but I believe EDK uses the IBM Chip Connect system which ORs the
outputs of all the peripherals together, rather than using a MUX. The
peripherals have to output a "0" (Zero) on the bus when they are not
selected. I presume the advantage is that the MUXes do not need to be
nested. It used to be that Xilinx FPGAs had wide "OR" gates in them. I'm not
sure if that was the original intention of them or quite what.

I can't stress enough how beneficial it is to simulate your design before
attempting synthesis. A significant portion of my job involves FPGA design
work and I _always_ simulate any new designs before they see silicon. Not
only is it a great tool to understand (from a learning POV) what's going
on,
a single simulation can save you _days_ of head-scratching and blinking
debug leds... :)

Yes - I've had enough of that.  I did more last night and got no where.

So how easy is it to get going with some sims on the ISE Wepback?

I need to try this I think.  I realise professionals simulate *everything*
first and have myself in the past when using some Altera 5128 parts (that
was a long time ago).

Anything more than very simple you generally can't fluke into working.  I
never expect my code to work first time for example...

Thanks.

Cheers,

... Andrew

With the ISE Web Pack software, they offer a trail version of the Modeltech
simulator.
I find the Model Tech simulator  hard to use, but that might be because it
is the trial version, and also probably because I have been too lazy to sit
down and figure it out properly.
I must admit, I suffer from the "lets see if it works first" syndrome, (is
it called "Lather, Rinse, Repeat" ?)  but inevitably you have to go back to
the simulator to get it right.
It's a bit like writing a program and expecting it to work first time
without using a software debugger or In Circuit Emulator to see what is
going on.

Talking of ICE, when I was first developing System09 I designed a hardware
breakpoint circuit, which I called a "bus_trap" I think. (This was for
software development rather than hardware development). You could trigger on
any address or data event and generate an interrupt o the CPU. I also tried
developing a trace capture buffer using block RAM, which I notice Xilinx has
picked up on and has been doing for a couple of years now with their Chip
Scope. Chip Scope seems rather limited in it trigger and qualification
facilities. I'm not sure if the Logic Analyzer people like HP and Tektronics
hold those patents. There is nothing to stop you from using the bus trap
logic as a trigger and qualifier for a real time trace buffer. The point is,
you could build quite a powerful software debug system into system09. I used
to have a cassette based disassembler for the 6809 that would be perfect for
disassembling the trace buffer contents.

John.

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